FANCO-16 v9 MONITOR ASSEMBLER - TENTATIVE ========================================= Enter instructions on the guest screen. Enter assembles and executes the current 32-character screen row. Arrow keys move the cursor; output, Enter and Down past the bottom row scroll the screen. Paste sends characters as key presses, and line breaks press Enter. Text after a semicolon is a comment. Instructions are placed consecutively from hexadecimal 1000. The monitor appends HCF to each instruction and uses the guest trap handler to return to its prompt. Registers and the user stack persist. A branch or PC write can bypass the appended HCF. Reset discards the session. ASMODEUS commands: DIR lists every binary in the universe; DIR TEXT lists those whose metadata contains every word of TEXT; MORE shows the next page; LOAD ID loads a program by hexadecimal ID (V9 marks loadable entries). The URL /v9/?load+107 types its decoded query and Enter after boot; | separates lines, as in /v9/?stw+$10,$105|stw+$104,$9a00|stw+$106,$160|stb+$10f,69 (a soft sine A4). Numbers are signed decimal, or hexadecimal prefixed by $ or 0x. Registers are a, b, x, y, p, r, sp, pc, with .lo and .hi byte views. The space after a comma is optional. Labels, expressions and data directives are not implemented. Moves and memory ---------------- mov a, 42 word register or immediate to register mov a, *$7000 word load from absolute address mov *x, a word store to address held in x movb *$107, 1 byte store (mov.b is also accepted) ldb a, $7000 byte load, zero-extended to a word ldw a, x word load from address held in x stb $10f, 69 byte store to absolute address stw x, a word store to address held in x For mov and movb, *address and [address] mean memory at an absolute address; *x and [x] mean memory at the address held in x. For ldb, ldw, stb and stw, the memory operand also accepts a bare address or address register. In an explicit byte instruction, a bare register means its low byte. movb preserves the destination high byte; ldb clears it. Byte immediates fit -128..255. Memory-to-memory moves are not supported. Addressing forms: [x], [x+12], [x-12], [x++], [--x], [$7000]. Displacements fit -128..127. Auto-update advances by the operand width. PC auto-update is not accepted. The * spelling also accepts these address forms without brackets. Instructions ------------ mov add sub and or xor cmp shl shr sar mul div mod: register destination, then a register, immediate or memory source. MOV also stores to memory. Use .b or .w to select width; otherwise register views determine it. inc and dec take one register; plain word forms use their one-byte opcodes. movzx and movsx widen a byte into a non-PC word register, zero/sign extending. lea takes a word register and a plain, displaced or absolute memory address. out.b takes memory and a byte register; in.b takes a byte register and memory. smulshift destination, source, shift (0..31); umulhi, adc, sbc, smin and smax take two word registers. abs takes one. Their destination cannot be PC. push and pop accept word or byte registers. call and jmp take an absolute address, word register or memory operand. ret returns through the user stack. bra bz bnz blt bge blo bhs ble bgt bls bhi bmi bpl bvs bvc take an absolute numeric target. Nearby branches use signed-byte displacement; distant ones use absolute word targets. .b forces a short branch; .w forces a long branch. nop, hcf, hlt, blit and reti take no operands. sleep takes a cycle count 0..65535. sys present submits the display. sys load (alias sys load32) loads an online object with ID in B:A; sys load16 uses A alone; sys loadn is load32 that fails unless the object writes at most R bytes (R = 0 means 65,536). These online services return at once and deliver in the background. sys load8 id, destination copies a bundled raw ROM object synchronously; only ROM ID zero is assigned. Its 256-byte bootstrap can be inspected with sys load8 0, $7000. ROM IDs 0-255 are immutable. RETI is assembled without immediate execution; it runs in an IRQ handler. All existing v9 CPU instructions are available. Some operand combinations use the CPU's general escaped encoding instead of its compact forms. Boot display: 64 KB guest RAM, 28 KB user program area (1000-7FFF), and the assembled monitor's byte count, including its mnemonic table and workspace. The separate font and character cells occupy 1024 bytes each. The last 16 bytes of the program area are reserved for instruction emission and HCF. Timer example from reset: a sawtooth A4 every second ---------------------------------------------------- stb $10f, 69 reti stw $105, 8 stw $600, $1000 stw $602, 1 The first instruction also sounds immediately. The handler at 1000 retriggers the note and returns. The envelope has a 2 ms attack, 300 ms decay and zero sustain. Set the rate at $602 to 2 for 120 BPM, or 0 to stop. IRQ handlers must preserve registers they use. See SPEC.txt and SOUND.txt for hardware.